Developing FPGA’s for High Speed Computational Power

The next generation of hardware for radio telescopes’ signal processing requires high-speed computing and data throughput capabilities. To achieve high-speed computation power, Field Programmable Gate Arrays (FPGA) are used. FPGAs contain millions of programmable gates and provide flexibility in designing custom hardware.

As an example, currently, each Event Horizon Telescope (EHT) site uses four ROACH2 FPGA boards that together process data at 64 Gb/s, which provides 4GHz of bandwidth for each sideband. Arash Roshanineshat (Univ. Arizona) is using a Xilinx ZCU111 evaluation board to prototype a design that will increase the processing speed to 128Gb/s or 8GHz bandwidth per sideband.

His work includes designing new signal processing hardware with Verilog modeling language and writing a pipeline from hardware to a user-end monitoring system with C language. To facilitate this, he is using tools provided by Xilinx including Xilinx Vivado and SDK. Fast data visualization is a crucial design tool as it allows the user to monitor and fine-tune performance. Arash is taking the novel approach of implementing his data visualization and monitoring system using a Graphical User Interface (GUI) in a game engine. He is currently using Godat which supports a Microsoft Windows monitoring system and also allows parallel monitoring for smartphones (currently developing for Android).

With the game engine handling graphics, development work is prioritized for performance and functionality rather than tweaking the GUI. At this stage of the design, the ZCU111 is capable of sampling signals in the time domain and sending the data to a computer (or smartphone) to plot it. The next step is to transform the signal to the frequency domain to determine frequency components.